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一种GaN FET开关用高压高速驱动器的设计与实现 被引量:2

Design and Implementation of a High Voltage and High Speed GaN FET Switch Driver
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摘要 设计了一种GaN场效应晶体管(FET)开关用高压高速驱动器电路,该电路集成了TTL输入级、高压电平转换级及大功率输出级电路,其主要功能是对输入的TTL信号进行电平转换,输出0 V/负高压信号。输入级采用施密特结构实现输入兼容TTL信号的同时提高了输入噪声容限,电平转换级、输出级对传统电路结构做了改进,转换速度更快,功耗更低。该电路采用标准硅基高压CMOS工艺制造流片,芯片测试结果表明,负电源工作电压为-5^-40 V,静态电流小于10μA,动态电流为5 m A@10 MHz,传输延时小于20 ns。芯片尺寸为1.42 mm×1.83 mm。该电路具有响应速度快、功耗低以及抗噪声能力强等特点,可广泛应用于微波通信系统中。 A high voltage and high speed GaN field effect transistor (FET) switch driver was de- veloped, which consisted of TTL input-stage, high-voltage level shifter and high-power output circuit. This circuit could convert the input TTL signals to 0 V/negative high-voltage signals. The input stage cir- cuit used Schmitt structure to be compatible with TTL signal and increase the input noise tolerance, while the level shifter and output stage improved the conventional circuit structures to get faster transition rate and lower power dissipation. Using standard Si-CMOS high-voltage process, the measurement results show that the chip could work well with negative supply voltage from -5 V to -40 V, consuming less than 10 μA static current in while 5 mA dynamic current and less than 20 ns transmission delay in switch state with switch frequency of 10 MHz. The final chip area is 1.42 mm× 1.83 mm. The circuit can be widely used in microwave communication system for the characteristics of fast response, low power com- sumption and strong anti noise ability.
作者 王子青 廖斌
出处 《半导体技术》 CAS CSCD 北大核心 2016年第9期674-678,共5页 Semiconductor Technology
关键词 Ga N场效应晶体管(FET)开关 高压驱动器 施密特电路 电平转换 死区时间 GaN field effect transistor (FET) switch high-voltage driver Schmitt circuit levelshifter dead time
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参考文献8

  • 1ZHENG X S, TREMBLAY J C, HUETTNE S E, et al.Ka-band high power GaN SPDT switch MMIC [ C ] //Proceedings of IEEE Compound Semiconductor IntegratedCircuit Symposium ( CSICS ). Monterey, CA, USA,2013: 1-5.
  • 2陈爱华,陈永任.一种PIN开关高速驱动器的设计[J].微电子学,2006,36(4):492-494. 被引量:3
  • 3叶红松,李洋,杨阳.一种大电流高速PIN驱动器的设计与实现[J].微电子学,2009,39(1):81-84. 被引量:4
  • 4RABAEY J M, CHANDRAKASAN A, NIKOLIC B.数字集成电路-电路、系统与设计[M].周润德,译.第2版.北京:电子工业出版社,2004: 266-268.
  • 5FILANOVSKY I M,BALTES H. CMOS schmitt tiggerdesign [ J ]. IEEE Transactions on Circuit s and Sys-tems, 1994,41 ( 1 ) : 46-49.
  • 6哈继欣,高玉竹.用于多电压域设计的双向全摆幅电平转换器[J].上海师范大学学报(自然科学版),2012,41(5):466-469. 被引量:4
  • 7HA J X,GAO Y Z. A threshold to full swing bidirectionallevel shifter for multi-voltage system [ J ]. Journal ofShanghai Normal University ( Natural Sciences),2012,41(5) : 465-469.
  • 8ALI S,TANNER S, FARINE P A. A robust, low power,high speed voltage level shifter with built-in short circuitcurrent reduction [ C ] // Proceedings of the 20th Euro-pean Conference on Circuit Theory and Design ( EC-CTD). Linkoping,Sweden, 2011: 142-145.

二级参考文献10

  • 1KAZIMIERCZUK M K. High-speed driver for switch power MOSFETs [J]. IEEE Trans Circ and Syst, 1988, 35(2): 254-256.
  • 2拉扎维B.模拟CMOS集成电路设计[M].陈贵灿,等译.西安:西安交通大学出版社,2005.
  • 3GRAY P R,HURST P J,LEWIS S H,et al.模拟集成电路的分析与设计[M].北京:高等教育出版社,2005.
  • 4南京工学院.电子线路[M].北京:人民教育出版社,1983.
  • 5Kazimierczuk M K.High-speed driver for switch power MOSFETs[J].IEEE Trans Circ and Syst,1988,35(2):254-256.
  • 6周志敏.开关电源实用技术设计与应用[M].北京:人民邮电出版社,2004.1-1.
  • 7张占松.开关电源的原理设计[M].北京:电子工业出版社.2004.
  • 8CHANG J M,PEDRAM M. Energy minimization using multiple supply voltages [ J ]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1997,5 (4) :436 - 443.
  • 9LUTKEMEIER S, RUCKERT U. A subthreshold to above-threshold level shifter comprising a wilson current mirror [ J ]. IEEE Transactions on Circuits and Systems II: Express Briefs,2010,57 (9) :721 -724.
  • 10ALLEN P E, HOLBERG D R. CMOS analog circuit design[ M]. 2nd edition. Oxford:Oxford University Press,2002.

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