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一种混合前缀编码的测试数据压缩方法 被引量:1

A Hybrid Prefix Encoding Method of Test Data Compression
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摘要 SOC测试中的测试数据具有数据量大、游程长等特征,对此提出一种新的测试数据压缩方法——混合前缀游程编码.通过改进传统双游程编码思想,在每一个码组内添加带有特殊前缀的新编码对测试集中的任意长度的0、1游程同时进行从变长到变长编码,达到仅折损一位从而缩小整体编码长度的目的,同时给出了基于有限状态机的解码器方案.理论分析和ISCAS89电路的实际测试结果验证了该编码方法有着良好的测试压缩效果. As the test data in the SOC test has the characteristics of large amount of data and its length, put forward a new testmethod for data compression - hybridprefix-run-length encoding. By improving the thought of raditional double run-length coding thought, in each new code added in the group with a special prefix codes to test set of arbitrary length 0 and 1, run simultaneously from longer to variable length coding. By only wreck a code, so as to reduce overall length coding. At the same time decoder scheme based on the finite state machine is presented. The theory analysis and ISCAS89 actual test results show that the coding method has good test compression effect.
作者 谈恩民 李贞
出处 《微电子学与计算机》 CSCD 北大核心 2016年第9期89-92,97,共5页 Microelectronics & Computer
关键词 双游程编码 测试数据压缩 解码 dual run length test data compression decode
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参考文献6

  • 1程一飞,詹文法.一种双游程交替编码的测试数据压缩方法[J].计算机科学,2014,41(11):22-24. 被引量:6
  • 2Chandra A,Chakrabarty K. System-on-a-chip test-data compression and decompression architectures based on- Golomb codes[J]. IEEE Transactions on Computer-Ai- ded Design of Integrated Circuits and Systems, 2001, 20(3) : 355-368.
  • 3Nourani M, Tehranipour M. RL-huffman encoding for test compression and power reduction in scan applica- tion[J]. ACM Trans Des Autom Electron Syst, 2005, 10(1) : 91-115.
  • 4韩银和,李晓维.测试数据压缩和测试功耗协同优化技术[J].计算机辅助设计与图形学学报,2005,17(6):1307-1311. 被引量:15
  • 5Chandra A,Chakrabarty K. Test data compression and test resource partitioningforsystem-on-a-chip using fre- quency-directedrun-length ( FDR ) coeds [ J ]. IEEETransactionson Computer Aided Design of Inte-grated CircuitsandSystems, 2003,52 (8) : 1076-1088.
  • 6商进,张礼勇.一种双游程编码的测试数据压缩方案[J].哈尔滨理工大学学报,2010,15(4):19-22. 被引量:3

二级参考文献28

  • 1彭喜元,俞洋.基于变游程编码的测试数据压缩算法[J].电子学报,2007,35(2):197-201. 被引量:33
  • 2KCHAKRABARTY A C.System-on-a-Chip Test Data Compression and Decompression Architectures based on Golomb codes[J].IEEE Transitions on CAD of Integrated Circuits and System(S0278-0070),2001,20(3):355-368.
  • 3JAS A,GHOSH D J,TOUBA N.Scan Vector Compression/Decompression using Statistical Coding[C] ∥Proc.VLSI Test Symp,San Diego,CA,April 1999:114-120.
  • 4JAS A,Touba N.Test vector decompression via cyclical scan chains and its application to testing core-based designs[C] ∥Proc.Int.Test Conf.,Washington,DC,October,1998:458-464.
  • 5NOURANI M,TEHRANIPOUR M.RL-Huffman Encoding for Test Compression and Power Reduction in Scan Application[J].ACM Trans.Des.Autom.Electron.Syst.,2005,10 (1):91-115.
  • 6CHANDRA A,CHAKRABARTY K.Test Data Compression and Test Resource Partitioning for System-on-a-chip using Frequency-directed run-length (FDR) Codes[J].IEEE Trans.Comput.,2003,52(8):1076-1088.
  • 7ROSINGER P,GONCIARI P,Al-Hashimi B,et al.Simultaneous Reduction in Volume of Test Data and Power Dissipation for System-on-a chip[J].Electron.Lett.,2001,37(24):1434-1436.
  • 8TEHRANIPOUR M,NOURANI M,CHAKRABARTY K.Nine-coded Compression Technique for Testing Embedded cores in SoCs[J].IEEE Trans.Very Large Scale Integr.Syst,2005,13(6):719-731.
  • 9LI L,CHAKRABARTY K.Test Data Compression using dictionaries with Fixed Length Indices[C] ∥Proc.VLSI Test Symp.Napa Valley,CA,April.2003:219-224.
  • 10EL-MALEH A,AL-ABAJI R.Extended Frequency-directed Run Length Code with Improved Application to System-on-a-chip Test Data Compression[C] ∥Proc.9th IEEE Int.Conf.Electronics,Circuits and Systems,Dubrovnik,Croatia,September,2002:449-452.

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