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基于FPGA的FIR数字滤波器设计与仿真 被引量:2

The Design and Simulation of FIR Digital Filter
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摘要 针对微弱信号数字相关检测系统的应用问题,设计了基于FPGA的FIR数字滤波器.通过对不同结构的FIR滤波器的特性进行分析比较,结合运算处理速度和资源消耗等因素,确定采用优化的分布式算法来设计数字滤波器.最后对设计的FIR低通数字滤波器进行了功能仿真,仿真结果显示:设计的FIR低通数字滤波器能够有效滤除带外噪声,能够满足数字信号相关检测系统的应用要求. FIR digital filter based on FPGA is designed for the application of the weak signal digital correlation detection system. The design adopts the optimized distributed algorithm after comparing the characteristics of different structure of FIR filter and considering such factors as the comprehensive processing speed and resource consumption. Finally, the functional simulation is carried out for the designed FIR low--pass digital filter. Simulation results show that the FIR low--pass digital filter can effectively filter out noise outside of the passband, and it is satisfied with application requirement of the weak signal digital correlation detection system.
作者 杨峰
出处 《四川文理学院学报》 2016年第5期33-35,共3页 Sichuan University of Arts and Science Journal
基金 四川文理学院2014年度青年启动项目"GMR生物传感器专用数字锁相检测电路设计"(2014Z006Q)
关键词 数字滤波器 MATLAB FPGA 分布式算法 Digital filter , MATLAB FPGA Distributed Algorithm
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参考文献7

  • 1赵俊杰,郝育闻,郭璐璐,金明录.数字锁相放大器的实现研究[J].现代电子技术,2012,35(3):191-195. 被引量:16
  • 2Uwe Meyer-Baese.数字信号处理的FPGA实现:第2版[M].刘凌,译.北京:清华大学出版社.2006:66-119.
  • 3田耘,徐文波,张延伟,等.无线通信FPGA设计[M].北京:电子工业出版社,2007.
  • 4王秀敏,汪毓铎,张洋,杨世华.通信系统中FIR数字滤波器的设计研究[J].通信技术,2009,42(9):3-6. 被引量:8
  • 5Vinay K.Ingle,John G.Proakis.数字信号处理[M].刘树棠,译.陕西:西安交通大学出版社,2013:57-62.
  • 6Ali AI-- Haj.Configurable Multirate Filter banks[J]. American Journal of Applied Sciences, 2008(7) : 788- 797.
  • 7Amita Nandal, T.Vigneswarn, Ashwani K. Rana, et al. An Efficient 256-Tap Parallel FIR Digital Filter hn- plementation Using Distributed Arithmetic Architecture[J]. Procedia Computer Science, 2015(54):605-611.

二级参考文献17

  • 1孙志斌,陈佳圭.锁相放大器的新进展[J].物理,2006,35(10):879-884. 被引量:38
  • 2Michael D Ciletti. Advanced Digital Design with The Verilog HDL[M]. [s. l. ]:Publishing House of Electronics Industry, 2007.
  • 3SONNAILLON M O, BONETTO F J. A low-cost, high- performance, digital signal processor-based lock-in amplifier capable of measuring multiple frequency sweeps simultaneously [J]. Review of Scientific Instruments, 2005,76 (2) : 024703-024703-7.
  • 4BARONE Fabrizio, CALLONI Enrico. High performance modular digital lock-in amplifier [J].American Institute of Physics, 1995, 66(6): 3697-3702.
  • 5BARRAGAN L A, ARTIGAS J I. A modular, low-cost, digital signal processor-based lock-in card for measuring optical attenuation [J].Review of Scientific Instruments, 2001,71(1) : 247-251.
  • 6MASCIOTTI J M, LASKER J M, HIELSCHER Andreas H. Digital lock-in detection for discriminating multiple modulation frequencies with high accuracy and computational efficiency [J]. IEEE Transactions on Instrumentation And Measurement, 2008, 57(1): 182-198.
  • 7WU Dong-yue, WANG Chao, SUN Hong-jun, et al. A novel digital lock-in amplifer with dual channels [C]// CAR' 2009. Bangkok: IEEE, 2009: 464-468.
  • 8DOLECEK G J, MITRA S K. Two-stage CIC-based decimator with improved characteristics [J]. IET Signal Process, 2010, 4(1): 22-29.
  • 9AKTAN Mustafa, YURDAKUL Arda, DUNDAR Ganhan. An algorithm for the design of low-power hardware efficient FIR filter [J]. IEEE Transactions on Circuits and Systems, 2008, 55(6): 1536-1545.
  • 10SONNAILLON Maximiliano O, URTEAGA Raul, BONETTO Fabian J. High-frequency digital lock-in amplifier using random sampling [J]. IEEE Transactions on Instrumentation and Measurement, 2008, 57 (3): 616-621.

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