基于SoC FPGA的中频数字接收机设计与实现

Design and Realization of the IF Digital Receiver Based on SoC FPGA

为实现车载式接收机小型化、低功耗的要求,基于Altera公司SoC架构Cyclone V系列芯片,采用软硬件协同的设计方法,完成了宽带中频数字接收机的设计。该设计集成A/D芯片、DDR3存储芯片、GPS芯片等外围电路,在FPGA部分实现了中频信号扫频、单包或连续采集、数字下变频、频谱分析,在ARM处理器部分搭建了Linux操作系统,实现了ITU参数测量、音频解调、场强计算等功能,FPGA与ARM之间采用AXI总线传输数据,实测传输速率达到7.2Gb/s,保证了数据的连续性与实时性。

In order to reduce the volume of broadband IF receiver,a design based on Altera SoC architecture Cyclone V series chips is put forward.This design realizes through the method of software and hardware coordination.Circuit design integrates DDR3 memory chip,GPS chip and other peripheral circuits.In the part of FPGA,the scan,single package or continue sampling of IF signal,DDC,spectrum analysis are realized.In the part of ARM,ITU parameter measurement,audio demodulation,field density calculation and so on in Linux system are realized.The FPGA and ARM integrate on SoC transmit data by AXI bus,data rate between them reaches 7.2Gb/s.Therefore,it ensures the continuity and real-time of data.