面向多核的高并行度ECC算法执行结构

Implementation structure of ECC algorithm with high degree of parallelism for multicore processor

为提高多核密码处理器执行ECC算法的速度,在分析ECC算法运算特征的基础上,提出结合向量、超长指令字和超标量的并行层叠执行结构,该结构支持ECC算法数据级、线程级和任务级的并行计算。设计ECC单元阵列流水线微结构、中断控制电路、资源配置表、任务分配列表以及数据输入输出管理单元。通过高并行度算法在ECC单元阵列上的映射实验和性能分析验证了该设计对多核的ECC算法计算性能提升明显,适配灵活性更强。

A parallel laminated structure was proposed to improve multicore processor＇s speed of executing ECC algorithm.The operation characteristics of ECC algorithm were analyzed.A vector,VLIW and superscalar combined parallel laminated structure was raised,which supported parallel computing of data level,thread level and task level.The pipeline microstructure of ECC cell array,the interrupt control circuit,the resource allocation table,the task allocation list and the data input/output management unit were designed.The analysis of cell array mapping experiment was carried out for high degree of parallelism ECC algorithm.The result shows that the design improves the performances of ECC algorithm with adaptive flexibility.