摘要
氮化镓(GaN)功率电子器件具有高击穿电压、高工作频率、高电流输出能力以及耐高温等优点,有望成为下一代高效电源管理系统芯片的最佳候选之一.本文从界面态起源、极化能带工程以及可靠性机理等角度分析了GaN基功率电子器件所面临的器件物理挑战,包括栅极阈值不稳定性、高压动态导通电阻退化、高阈值栅技术和栅介质长期可靠性等关键科学问题和技术瓶颈.分析指出(Al)GaN表面的无序氧化可能是GaN基器件表/界面态的主要来源,并有针对性地介绍了界面氮化插入层、极性等离子增强原子层沉积AlN薄膜(Plasma-Enhanced Atomic Layer Deposited AlN,PEALD-AlN)钝化、F离子注入与高温栅槽刻蚀增强型技术,以及低压化学气相沉积SiNx(Low-Pressure Chemical Vapor Deposited SiNx,LPCVD-SiNx)和O3-Al2O3高绝缘栅介质等提高GaN基增强型器件性能的新型工艺技术.系统分析了国际有关高性能GaN功率电子器件研究的最新进展,及未来面临的机遇和挑战.
Gallium-nitride-based power electronic devices, with the inherent high breakdown voltage, high working frequency,high output current density and high temperature operating capability, are promising candidates for next-generation high-efficiency and compact power management systems. In this work, the scientific and technical challenges towards high-performance GaN power devices, including threshold voltage instability, dynamic ON-resistance degradation,enhancement-mode gate techniques and long-term reliability of gate dielectrics, are investigated based on in-depth analysis of the physical origin of interface states and high-voltage current collapse. Oxidation of(Al) GaN surface are suggested to be the primary cause for the surface/interface states in GaN-based power devices. State-of-the-art device technologies, including nitridation-interficial-layer to suppress dielectric/(Al) GaN interface oxidation, polarized PEALD-AlN passivation for compensation of deep interface states, E-mode techniques of fluorine plasma ion implantation and high-temperature low-damage gate-recess, high-breakdown-strength LPCVD-SiNx and O3-sourced ALD-Al2O3 gate dielectrics are introduced for fabrication of high performance and reliability GaN-based power electronic devices.
出处
《中国科学:物理学、力学、天文学》
CSCD
北大核心
2016年第10期84-99,共16页
Scientia Sinica Physica,Mechanica & Astronomica
基金
中国科学院微电子器件与集成技术重点实验室课题基金
国家自然科学基金(编号:61474138
61534007
61527816
61404163)
香港研究资助局优配研究项目(编号:611512
16207115)
香港创新科技基金项目(编号:ITS/192/14FP)资助
关键词
氮化镓
功率电子器件
界面态
动态导通电阻
增强型
栅介质
可靠性
gallium nitride
power devices
interface states
dynamic ON-resistance
enhancement-mode
gate dielectric
reliability