摘要
提出了一种应用于高速高精度流水线ADC中的高增益大带宽的增益自举型全差分折叠共源共栅放大器.放大器采用0.18 μm 1P6M CMOS工艺.通过仔细的设计运放的单位增益带宽和极零点改善其闭环稳定性.仿真结果表明:放大器的直流增益为93 dB,单位增益带宽为1.8 GHz,在输出共模电压范围为0.6 V^1.2 V内,放大器的直流增益大于88 dB.整个芯片的版图面积为96μm×120μm.
This paper presents a high unity gain bandwidth fully differential folded-cascode operational amplifier using gain-boosted technique. The amplifier is designed in TSMC 0.18 μm 1P6M CMOS technology. The unity-gain bandwidth (GBW) and poles of the gain-boosting amplifiers were carefully designed to improve the stability. The implemented design provides a direct current (DC) gain of around 93 dB with a unity gain frequency of 1.8 GHz. It exhibits a DC gain larger than 88 dB when the output common-mode voltage between 0.6 V and 1.2 V. The overall layout size is 96 μm×120 μm.
出处
《河北工业大学学报》
CAS
2016年第4期20-23,共4页
Journal of Hebei University of Technology