期刊文献+

圆片级封装铝锗键合后残余应力的测量和分析

Measurement and analysis of residual stress in WLP with Al-Ge bonding
下载PDF
导出
摘要 以圆片级铝锗键合后的残余应力为研究对象,在键合环下方和周围制作了一系列形状相同的力敏电阻条,通过比较键合前后力敏电阻条的阻值变化,分析电阻条处残余应力的大小及与工艺相关性。结果表明:键合环内外的压阻变化约为键合环下方压阻变化的3倍。这种方法可以作为晶圆级键合质量的有效在线表征手段之一。 Taking residual stress in wafer level packaging(WLP) with A1-Ge bonding as research object, a series of resistor stripe with the same shape are fabricated beneath or adjacent to the bond pad. Analyze magnitude of residual stresses on resistors strip and its correlation with the process by comparing resistance variation of resistor stripe before and after bonding. Results show that the resistance variation of piezoresistors inside and outside the bond pad is three times larger than that beneath the bond pad. This method can be one of the effective means for online characterization of wafer level bonding quality.
出处 《传感器与微系统》 CSCD 2016年第10期40-42,共3页 Transducer and Microsystem Technologies
关键词 铝锗共晶键合 残余应力 力敏电阻 Al-Ge eutectic bonding residual stress piezoresistance strips
  • 相关文献

参考文献5

  • 1许东华,张兆华,林惠旺,刘理天,任天令.硅玻璃阳极键合绝压压阻式压力传感器中的残余应力[J].功能材料与器件学报,2008,14(2):452-456. 被引量:6
  • 2Huang G, Tan C M, Gan Z H, et al. Finite element modeling of residual mechanical stress in partial SOI structure due to wafer bonding processing[ C ]//11th IPFA, Taiwan: IEEE ,2004:189 - 192.
  • 3Lin T W, Elkhatib O, Makinen J, et al. Residual stresses at cavity comers in silicon-on-insulator bonded wafers [ J ]- J Micmmech Mieroeng,2013, 23:095004.
  • 4Lin L W. MEMS post-packaging by localized heating and bon- ding[J]. Transactions on Advanced Packaging, 2000,23 ( 4 ) : 608 -616.
  • 5Hayes F H, Longbottom R D, Ahmad E,et al. On the A1-Si,A1- Ge,and AI-C,e-Si systems and their application to brazing in high power semiconductor devices [ J ]. Journal of Phase Equilibria, 1993,14(4) :425 -431.

二级参考文献7

  • 1Knowles K M, Van Helvoort A T J. Anodic bonding[ J]. International Materials Reviews, 2006, 51 ( 6 ) : 273 - 311.
  • 2Knowles K M, Van Helvoort A T J,Holmestad R,et al. Anodic oxidation during electrostatic bonding [ J ]. Philos. Mag, 2004, 84(6):505-519.
  • 3Xing Q F, Yoshida M, Sasaki G. TEM study of the interface of anodic - bonded Si/glass[ J ]. Scripta Materialia,2002, 47(9) :577 -582.
  • 4Eniko T Enikov, James G Boyd. A finite - element formulation for anodic bonding [ J ]. Smart Mater Struct, 2000, 9(6) :737 -750.
  • 5Yu P, Pan Ch, Xue J. The anodic bonding between K4 glass and Si [ J ]. Materials Letters, 2005, 59 : 2492 - 2495.
  • 6Wei J, Wang Z P, Xie H,et al. Role of bonding temperature and voltage in Silicon -to -Glass anodic bonding [ A ]. IEEE Electronics Packaging Technology Conference [C]. 2002. 85-90.
  • 7Michael Harz, Winfried bruckner. Stress reduction in an- odically bonded silicon and borosilicate glass by thermal treatment[J]. J Electrochem Soc, 1996, 143(4):1409 - 1414.

共引文献5

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部