固定轮密钥的SM3算法密码芯片的设计

Design of Fixed Round Key Algorithm SM3 Cryptographic Chip

基于FPGA和SM3密码杂凑算法设计并实现一款密码芯片,该密码电路的具体技术指标如下:总功耗为82.57m W,芯片静态功耗为82.54m W,共使用了3498个逻辑单元(占FPGA芯片逻辑单元总数的29%),0个存储器位,时钟频率达到了53.56MHz,处理速度达到了391.75×106位/s。

The design is based on Field Programmable Gate Array（FPGA） and SM3 cryptographic hash algorithm to design a cryptographic chip,the chip has the following indicators：total power consumption 82.57 m W,chip quiescent power82.54 m W,using a total of 3498 logical units（accounting for FPGA logic chip unit 29% of the total）,0 memory bit,the clock frequency of the 53.56 MHz,processing speed reached 391.75×106 bit / sec.