期刊文献+

时钟共享多线程处理器SIMD控制器设计与实现

Design and implementation of SIMD controller for a shared-clock multithreading processor
下载PDF
导出
摘要 针对图形图像处理器中指令与数据加载以及数据收集的问题,设计和实现了一种时钟共享多线程处理器中的SIMD控制器,完成相关SIMD指令的发送、数据的加载和数据的收集。该控制器以实现高效的数据级并行计算为目标,采用有限状态机实现了前向处理单元、行控制器和列控制器的设计。实验结果表明,所设计的专用硬件电路能够有效提高图形图像处理器处理并行数据的能力。 Aim at the issues that graphic processor loads commands data and collects data ,design and implement a shared-clock multithreading processor SIMD controller, to complete SIMD instructions sending,data loading and data collection. In order to achieve efficient data-parallel computing as the goal, we implement forward-processing unit, controllers and controller design with finite-state machine. Experimental results show that, using the design of dedicated hardware can improve the graphics processor's ability to handle parallel data.
出处 《电子技术应用》 北大核心 2016年第11期29-32,共4页 Application of Electronic Technique
基金 国家自然科学基金重点资助项目(61136002) 教育部科学研究计划重点资助项目(2111180)
关键词 多线程处理器 SIMD控制器 数据级并行 状态机 multi-threaded processor SIMD controller data-level parallel state machine
  • 相关文献

参考文献6

  • 1UNGERER T, ROBIC B, ~ILC J.Muhithreaded processors[J]. Computer Journal, 2002,45 (1) : 320- 348.
  • 2BRUNIE N,COLLANGE S,DIAMOS G.Simuhaneous branch and warp interweaving for sustained GPU performance[J]. Acm Sigarch Computer Architecture News, 2012,40(40): 49- 60.
  • 3SANKARALINGAM K, NAGARAJAN R,LIU H,et al. Exploiting ILP, TLP, and DLP with the polymorphous TRIPS architecture[J].IEEE Micro, 2003,31 (6) :422-433.
  • 4EGGERS S J,EMER J S,LEVY H M, et al.Simultaneous muhithreading:a platform for next-generation processors[J]. IEEE Micro, 1997,17(5) : 12-19.
  • 5张骏,樊晓桠,刘松鹤.多核、多线程处理器的低功耗设计技术研究[J].计算机科学,2007,34(10):301-305. 被引量:15
  • 6李涛,杨婷,易学渊,蒲林,钱博文,黄光新,黄虎才,韩俊刚.萤火虫2:一种多态并行机的硬件体系结构[J].计算机工程与科学,2014,36(2):191-200. 被引量:16

二级参考文献29

  • 1Yano K, et al. A 3.8ns CMOS 16×16 Multiplier Using Complementary Pass Transistor Logic. IEEE Journal of Solid State Circuits, April 1990. 388-395
  • 2Li Y, Brooks D, Hu Z,et al. Understanding the energy efficiency of simultaneous multithreading. In:Proc ISLPED'04, Aug. 2004
  • 3Seng J, Tullsen D, Cai G. Power sensitive multithreaded architecture. In:Proc. ICCD 2000, 2000. 199-208
  • 4Burns J, Gaudiot J L. Area and system clock effects on SMT/ CMP processors. In: Proc. PACT Sep.2001. 211 -18.
  • 5Hammand L, Nayfeh B A, Olukotun K. A single-chip multiprocessor. IEEE Computer,1997, 30(9) :79-85
  • 6Donald J,Martonosi M. Temperature aware design issues for smt nad cmp architectures. In:Proceedings of the 2004 Workshop on Complexity-Effective Design, June 2004
  • 7Sasanka R, Adve S V, Chen Y K, et al. Debes. The energy efficiencyof cmp vs. smt for multimedia workloads. In: Proc. 18^th ICS, June 2004
  • 8Compton K,Hauk S.Reconfigurable computing:A survey of systems and software[J].ACM Computing Surveys,2002,34(2):171-210.
  • 9Hideharu A.A survey on dynamically reconfigurable processors[J].IEICE Transactions on Communications,2006,E89-B(12):3179-3187.
  • 10Flynn M.Some computer organizations and their effectiveness[J].IEEE Transactions on Computers,1972,21 (9):948.

共引文献29

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部