摘要
为了灵活支持多种高速以太网接口,将低密度奇偶校验(LDPC)编码运用在以太网数据转发,取消传统数据包解码,提出了LDPC并行编码架构。在考虑1G到100G以太网物理层编码码字长度约束的基础上,分别设计了针对1G、10G、100G接口中最大通道速率的LDPC(192,120),LDPC(594,462),LDPC(1188,990)码字,实现了信道编码处理的低时延。仿真结果表明,构造的准循环LDPC码误码性能优,系统的处理时延小(考虑了编码时延和译码时延)。LDPC编码时延在0.58-1.17 μs之间,译码时延在3.20-4.26 μs之间,可以满足不同以太网接口的最大通道编译速率。
This paper presented interface-aware Low Density Parity Check (LDPC) codes in parallel encoding framework to support high-speed Ethernet data transmission and cancel the packets decoding process. Considering constraints of encoded codeword length of 1G to 100G Ethernet physical layer, LDPC(192,120), LDPC(594,462), LDPC(1188,990) codes aiming the maximum channel rate for 1G, 10G and 100G Ethernet interface were designed to reach low latency in channel coding process. The simulation results claimed that LDPC codes have excellent performance and minimum processing delay in system, taking encoding delay and decoding delay into consideration. The encoding delay of 0.58-1.17 μs and the decoding delay of 3.20-4.26 μs could meet the maximum code rate for different channels in Ethernet interfaces.
出处
《电子设计工程》
2016年第22期1-4,共4页
Electronic Design Engineering
基金
国家高技术研究发展计划(863计划)(SS2015AA011307)
上海市自然科学基金(15ZR1447600)
关键词
以太网接口
数据转发
并行编码架构
编码时延
译码时延
Ethemet interface
data transmission
parallel encoding framework
encoding delay
decoding delay