用于ADC测试的数据采集系统的设计

Data acquisition system for ADC testing

介绍了一种可用于百兆级采样率模数转换器(ADC)测试的数据采集系统,给出其硬件设计原理与方法,并简要介绍了上位机软件工作流程。该系统主要用于进行8位或16位100 MHz采样率ADC的动态参数的测试,采用FPGA+USB的形式。其中,FPGA负责对采集的数据进行缓存和传输,然后通过USB将数据上传到上位机中,最后利用上位机软件的控制算法实现对待测ADC参数的计算与显示,从而得出电路的测试结果。该系统性目前已用于日常电路测试,并取得了良好的效果。

A design of data acquisition system for 100 MHz sampling rate ADC testing,and gives its hardware design principle and method,then briefly introduces the PC software working process.The system is adopted a form of FPGA＋USB and mainly used for testing the dynamic parameters of 8or 16 bit 100MHz sampling rate ADC.Among of them,FPGA is responsible for the collection of data caching and transmission,then through the USB to upload data to the host computer and use the control algorithm to calculate the ADC parameters and display them,thus obtains the result of the test ADC.The system has been used in routine testing,and has achieved good results.