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基于ROBDD的电路功耗估算方法 被引量:1

Circuit Power Consumption Estimation Method Based on ROBDD
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摘要 概率功耗估算方法和条件概率功耗估算方法估算的功耗作为优化的成本函数时,由于方法本身的局限性或忽略了电路节点特点会降低估算结果的准确度,从而影响功耗优化结果。针对上述问题,提出一种新的电路功耗估算方法。该方法采用信号概率和跳变密度,并根据约简的有序二叉决策图(ROBDD)表示逻辑函数的特点,对ROBDD节点特征分类,从而对电路进行功耗估算。实验结果表明,该方法能够较好地预测电路的功耗,且功耗估算的精度优于概率估算方法和条件概率估算方法。 When the power consumption estimated by the probability power estimation method is used as the cost function for power optimization, the limitations of the methods themselves or ignoring the characteristics of the circuit node lead to lower accuracy of the estimation results and then affect the power optimization results. Aiming at these problems,a new power estimation method is proposed. It estimates the power effectively by giving the signal probability and transition density of input signals, and then classifying the characteristics of Reduced Ordered Binary Decision Diagram (ROBDD) nodes based on ROBDD representation. Experimental results show that this method can better predict the power consumption of the circuit, and the power consumption estimation precision is superior to that of the probability and conditional probability estimation methods.
出处 《计算机工程》 CAS CSCD 北大核心 2016年第12期78-83,共6页 Computer Engineering
基金 国家自然科学基金(6113001)
关键词 功耗估算 信号概率 乘积和 开关活动性 动态功耗 power consumption estimation signal probability Sum of Products (SOP) switching activity dynamicpower consumption
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  • 1杨莉,张弘,李玉山.一种快速自适应RSUSAN角点检测算法[J].计算机科学,2004,31(5):198-200. 被引量:23
  • 2V Tiwari, P Ashar, S Malic. Technology mapping for low power[A]. In: Proceedings of the 30th IEEE/ACM International Conference DAC,Dallas,1993.74~79
  • 3C Y Tsui, M Pedram, A M Despain. Technology decomposition and mapping targeting low power dissipation[A]. In: Proceedings of the 30th IEEE/ACM International Conference DAC, Dallas, 1993.68~73
  • 4H Zhou, D F Wang. An exact gate decomposition algorithm for low-power technology mapping[A]. In: Proceedings of IEEE/ACM International Conference Computer-Aided Design(ICCAD97), San Jose,1997.575~580
  • 5C C Tsui, M M Sandowska. Technology mapping for low power[A]. In: Proceedings of the 33rd IEEE/ACM International Conference DAC, Las Vegas, 1996. 68~73
  • 6U Narayanan, C L Liu. Low power logic synthesis for XOR based circuits[A]. In: Proceedings of IEEE/ACM International Conference Computer-Aided Design(ICCAD97), San Jose, 1997.570~574
  • 7H Zhou, D F Wang. Optimal low power XOR gate decomposition[A]. In: Proceedings of the 37th IEEE/ACM International Conference DAC, Los Angeles, 2000. 104~107
  • 8F N Najm. Transition density: A new measure of activity in digital circuits[J]. IEEE Transactions on CAD, 1993, 12(2):310~323
  • 9XIA Y, YE X, WANG L, et al. Novel synthesis method of mixed polarity Reed-Muller functions[C]// Proceedings of Third lASTED Conference on Circuits, Signals and Systems, Marina del Rey, CA, USA, 2005:148-153.
  • 10NARAYANAN U, I.IU C L. Low power logic synthesis for XOR based circuits[C]//IEEE/ACM International Conference on Computer Aided Design, San Jose, USA,1997:570-574.

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