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基于预取和缓存原理的片上Flash加速控制器设计 被引量:3

A high efficient E-Flash accelerator based on pre-fetch and cache principles
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摘要 为了提高片上Flash在嵌入式应用中的读取速度,提出了一种基于预取和缓存原理的片上Flash加速控制器。该控制器包括预取缓存和高速缓存两种加速方案。其中预取缓存方案采用位宽扩展和预取技术加速顺序指令的读取,并采用分支缓存存储非顺序指令,降低由非顺序指令造成的预取缺失代价;而高速缓存方案采用组相联和路预测技术,提高指令重用率,减少Flash访问次数,降低系统功耗。针对不同的应用场景,两种加速方案既可通过寄存器来静态切换,也可通过软件流程来自适应动态切换,从而获得最佳的读取速度提升。多项基准程序的测试结果表明了所提出的片上Flash加速控制器在性能和功耗优化上的可行性和高效性。 Based on pre-fetch and cache principles, we realize a Flash acceleration controller which is used to improve the efficiency of Flash memory in different embedded applications. The controller contains two acceleration schemes: prefetch cache and high-speed cache. The pre-fetch-cache method uses the data width extension and pre-fetch technology to accelerate the access to sequence instructions, and uses the branch-buffer technology to reduce the missing penalty caused by the branch instruction. The high-speed cache method uses the set-associative and way-predict technology to improve instruction reuse and reduce the Flash access frequency and power consumption. The two acceleration methods can not only be selected statically by configuring related registers, but also be switched dynamically by the software flow. Several benchmark results prove the feasibility and efficiency of the proposed Flash acceleration controller in terms of performance and power optimization.
出处 《计算机工程与科学》 CSCD 北大核心 2016年第12期2381-2391,共11页 Computer Engineering & Science
基金 浙江省自然科学基金(LY14F020026) 中央高校基本科研业务费专项资金(2013QNA5008) 国家电网智能电网研究院项目(SGRI-WD-71-13-014)
关键词 FLASH 位宽扩展 预取 分支缓存 高速缓存 可配置 自适应 Flash data width extension pre-fetch branch-buffer cache configurable adaptive
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