摘要
高质量CCD模拟视频的实时采集、处理和显示与系统低功耗、易便携的需求非常广泛,因此提出把黑白模拟视频A/D转换后,通过FPGA的时序逻辑转换为满足ITU-R BT.601格式的数字视频,送往ARM数字相机接口;通过ISE软件仿真FPGA时序,并通过嵌入式系统软硬件设计,较好地实现了上述关键功能。
The real-time capture,process and display of high quality of CCD analog video signal,which has characteristics of low power consumption and portability,is extensively required. The black / white CCD video was converted through A / D,and then the digital data were presented to FPGA. The data were transformed to ITU-R. 601 digital video by FPGA timing logic,and then were input into ARM CAMIF. The key functions mentioned above were realized very well by ISE simulation of FPGA timing and designs of embedded system software and hardware.
出处
《蚌埠学院学报》
2016年第6期13-16,共4页
Journal of Bengbu University