摘要
三维片上网络通过硅通孔(Through Silicon Via,TSV)将多层芯片进行堆叠,具有集成密度大,通信效率高等特点,是片上多核系统的主流通信架构.然而,工艺偏差及物理缺陷所引发的错误和TSV良率较低等因素,使得三维片上网络面临严重的故障问题.为保证通信效率,对三维片上网络关键通信部件进行容错设计必不可少.本文针对三维片上网络关键通信部件——路由器和TSV的故障和容错相关问题,从容错必要性、国内外研究现状、未来的研究方向和关键问题、以及拟提出的相关解决方案四个方面,展开深入探讨.为提高片上网络可靠性、保证系统高效通信提供一体化的解决方案.
3D NoC stacking the multi-chips with TSV has many advantages, such as high integration density and high communication efficiency. It is the mainstream of communication architecture on multi-core on-chip systems. However, due to the process variation,physical defects and low yield of TSV,3D NoC is facing serious fault problems. It is essential to de- sign a fault-tolerant mechanism for 3D NoC to ensure the efficiency of communication. In this paper, we focus on the failure and fault-tolerance issues of the critical communication components (routers and TSVs) in 3D NoC. From the description of fault-tolerance necessity, researches situation at home and abroad, future research directions, key issues and the proposed so- lutions, we conduct an in-depth discussion. Thus, we provide integrated solutions for improving the reliability of NoC and en- suring efficient communication system.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2016年第12期3053-3063,共11页
Acta Electronica Sinica
基金
国家自然科学基金(No.61474036
No.61274036
No.61371025
No.61574052)
安徽省自然科学基金(No.1508085MF117)
关键词
集成电路
三维片上网络
容错
TSV
路由器加固
integrated circuit
3D NoC
fault tolerant
through-silicon-via
router reinforcement