基于部分重配置的FPGA内嵌BRAM测试方法

Testing Method of BRAM in FPGA Based on Partial Reconfiguration

对于FPGA的内嵌BRAM资源的测试,传统的方法存在着故障覆盖率不够高,测试配置数目较多,以及测试时间较长的缺点.针对上述问题,本文提出了一种新的利用FPGA内嵌ICAP核进行片内自动部分重配置功能来实现对FPGA内嵌BRAM核的内建自测试方法,且无需额外的外接存储单元.在已有方法的基础上提高了对写破坏故障、读破坏故障、干扰耦合故障、写破坏耦合故障、读破坏耦合故障以及BRAM初始化功能故障的覆盖,改进算法使程序执行周期数降低一半左右,同时将多个算法集成在同一个测试配置里来实现降低测试的完整配置数,从而降低测试时间.测试结果表明,该方法在故障覆盖率上可以达到100%,而且测试配置数可以降低至两个完整配置,其中每个完整配置里包含13个算法的片内自动部分重配置,实测得到总测试时间仅为131.216ms.

When testing the BRAM resource in FPGA,the traditional BRAM testing method has many limitations,such as the fault coverage is not enough,the number of test patterns is too much,the testing time is long.To address the problems discussed above,an ICAP on-chip partial reconfiguration based is proposed to test the Block RAM using built-in self test,which is no need to add extra memory resource.Improve the algorithms based on the testing methods which are already exist,adding a Block RAM initial testing algorithm,enhance the coverage of write disturb fault,deceptive read destructive fault,disturb coupling fault,write disturb coupling fault,deceptiveread destructive coupling fault and BRAM initial function fault,at the same time,reduce the clock cycles of testing algorithm in half.And we integrate all the algorithms into one test pattern to realize the purpose of reducing testing patterns,and then reduce the testing time.The experimental results show the method proposed in our article can make the fault coverage to 100%,and we reduce the test pattern number to two full configurations,and each configuration has 13algorithms＇partial reconfiguration on chip.The testing time of our method on board testing is only 131.216 ms.