宽带在片SOLT校准件研制及表征

Manufacturing and Characterizing of Broadband on-Wafer SOLT Calibration Standards

针对在片S参数校准,设计制作GaAs衬底SOLT校准组件,通过计算方法对校准组件中直通、开路、短路和负载校准件中偏置传输线的时延和损耗进行定义,运用基于NIST muiline TRL校准的测量方法对校准组件中开路校准件电容和短路校准件电感参数进行提取,结合直流电阻测试法测试负载阻值大小,实现对SOLT校准组件的完整表征。最后用自行研制并表征的SOLT校准组件校准在片S参数测试系统,通过测量无源器件验证校准效果,将测量结果与NIST multilineTRL校准后的测量结果比较,在20 GHz内传输幅度最大偏差0.1 dB,传输相位最大偏差3.5°。

On the GaAs substrate the SOLT calibration kits for on-wafer S-parameter test are designed. Using simulation method, the delay and loss of the offset transmission line on every standard in the calibration kits are characterized, and using measurement method based on NIST multiline TRL calibration, the capacitance of open standard parts and the inductance of the short standard are extracted. Subsequently the impedance of load standard is known by DC resistance measurement. Finally, the tests using independent developed SOLT calibration kits and NIST muhiline TRL calibration are preformed. The results show that at the frequency below 20 GHz, the maximum deviation of the transmission magnitude is 0. 1 dB, and the maximum deviation of transmission phase is 3.5 degree.