视频图像处理系统中SDRAM控制器的FPGA实现

Implementation of SDRAM controller based on FPGA in video image processing system

为实现视频图像处理系统中图像数据的实时处理,使用大容量的存储器完成数据缓存是必不可少的一个环节。针对SDRAM的工作原理及时序特性,现提出一种在FPGA芯片上实现SDRAM控制器的方案。根据实时图像数据传输速率的要求,SDRAM的操作模式配置为全页突发读写及自动刷新操作模式,将各个操作进行模块化设计并由一个总状态机控制。整个设计采用Verilog实现。实验结果表明,该控制器在视频图像处理系统中实现了本文所提出的数据高速缓存的功能,并具有读写效率高、控制简单、价格低廉等特点。

In order to achieve real-time processing of image data in video image processing,using the large capacity memory to complete the data cache is one essential step.It presents a SDRAM controller solution to FPGA chip in the realization of image data cache during video image processing in view of the working principles and time sequence characteristics of SDRAM.According to the requirement for real-time image data transmission rate,the operation mode is configured as full-page burst read and write and auto-refresh,with each operation modularization made and controlled by a total state machine.The design is implemented with Verilog.The result show that the controller is used to complete image data cache in the video image processing successfully,and that it has advantages of high READ/WRITE rate,simple control and low price and so on.