摘要
针对嵌入式设备对高性能数字信号处理器低功耗的需求,结合超标量处理器与超长指令字处理器各自的优点,提出一种将两种架构进行融合的单核处理器设计方法,取代ARM+DSP异构架构。充分发挥两者优势,降低处理器的功耗和面积,提高处理器在数字信号处理方面的性能;支持ARM指令集,顺序超标量模式的双发射和超长指令字模式的六发射能够极大提高地指令并行度。利用DSPStone基准测试程序对处理器进行测试验证,测试结果表明,混合架构的处理器性能平均提升了19.4%,最高提升了38.2%。
In view of embedded devices demands for digital signal processor with high performance and low power consumption, a hybrid microarchitecture integrating both Superscalar and very long instruction word (VLIW) in a single core was proposed to replace ARM and DSP heterogeneous architecture. The hybrid microarehitecture with combinations of the advantages of Superscalar and VLIW reduced the power consumption and the area of the processor and improved the performance of the processor in digital signal processing. ARM instruction set was supported, and double launch under in-order Superscalar mode and six launch under VLIW mode greatly improved instruction parallelism. Results of tests and verification based on DSPStone benchmark show that hybrid microarchitecture can significantly improve the performance of the processor. The average improvement is 19.4%, and the maximum is 38.2%.
出处
《计算机工程与设计》
北大核心
2017年第1期70-74,共5页
Computer Engineering and Design
基金
核高基重大专项基金项目(2012ZX01034001-002)
关键词
超标量
超长指令字
混合架构
指令并行度
流水线
superscalar
VLIW
hybrid microarchitecture
instruction parallelisms pipeline