VHDL中的有限状态机教学方法研究

Teaching Method Research on Finite State Machine in VHDL

本文以三段式编程框架介绍了VHDL中有限状态机的教学方法,即系统图、状态转换图和编程架构三部分。系统图用以确定系统模块和输入输出的位置,并合理分类强制和常规状态控制信号;状态图用以确定实现系统功能而设计的状态转换过程;基于系统图和状态图,编程架构使用三进程方式。教学过程中以位元检测器的设计为例,通过练习提高了学生对有限状态机的理解和设计能力。

A teaching method of the finite state machine in VHDL is proposed based on three-steps programming framework, i. e. , system paradigm, state transition paradigm, and programming architecture. The system paradigm determines system modules and positions of input signals, and classifies the forced and normal state controlling signals; The state transition paradigm illustrates the state transition process designed for implementation of the system functions; The programming architecture adopts three-processes method based on the system and state transition paradigms. Many bits detector are used as examples in teaching process, and the corresponding exercises improve the comprehension and design ability of the students in FSM.