基于IEEE-1588的高精度时钟同步系统设计

Design of High Precision Time Synchronization System Based on IEEE-1588

为提高高速铁路地震预警系统采集设备时间同步精度,设计了基于IEEE-1588的网络高精度时钟同步系统。系统利用STM32+FPGA构架搭建硬件平台,在FPGA中利用PLL延迟测量法实现高精度时间间隔测量,时间间隔测量精度达到600 ps;利用PHY芯片DP83640获取网络PPS时钟,在STM32中结合卡尔曼滤波与PID算法,实现网络PPS时钟对本地时钟的校正,以及对本地PPS相位校正,最终完成同步系统的软件设计。测试结果表明:本设计时钟同步误差优于3 ns,且具备长期稳定性。

In order to improve the precision of data acquisition equipment of the earthquake early warning systemfor high speed railway,a high precision time synchronization system based on IEEE-1588 is designed. The systemuses STM32 ＋ FPGA structure to set up a hardware,and it achieves high precision time interval measurementbased on PLL delay measurement in FPGA,of which measurement accuracy is 600 ps. The system obtains networktime by PHY chip DP83640,and combines Kalman filtering and PID algorithm in STM32 to correct local time andPPS phase by network time to complete software design of the synchronization system. The test result shows thaterror of time synchronization is less than 3 ns and stability maintains for a long-term.time synchronizationIEEE-1588 PLL delay measurementdistributed data acquisition