高速芯片、封装和印刷电路板的协同仿真

Chip-package-system Co-simulation for High Speed Circuit

介绍了芯片、封装和印刷电路板(CPS)协同仿真的组成、应用流程和案例。通过使用CPS协同仿真,在芯片设计时能够生成代表真实工作状态下的芯片电源和信号模型,在系统协同仿真时,可以利用芯片的电源/信号模型,获得完整的电源/信号网络参数和电流电压特性,有助于充分考虑芯片对封装和印刷电路板的影响,全面改善系统的信号/电源完整性,电磁兼容和热性能。

This paper summarizes the simulation tool, flow and applications of Chip-package-system（CPS） co-simulation methodology.With the benefit of CPS co-simulation, the compact power/signal model of chips conld be generated in real circumstance during chip design.While in system design process, the compact chip model along with PCB and package model could be used to predict the whole system power/signal network parameter and voltage/current distribution.From these simulation result, by estimating the impact of chip, the overall power/signal performance, electromagnetic compatibility and thermal performance conld be improved.