基于FPGA的CCSDS位平面编码设计与实现

Design and Implementation of Bit-Plane Encoding for CCSDS Based on FPGA

针对已有位平面编码实现扫描效率低、复杂度高等缺点,提出了一种CCSDS图像压缩位平面编码技术的FPGA实现方法。将CCSDS图像压缩算法位平面编码分为预处理、扫描、熵编码等几个关键模块,采用流水结构对系统进行设计。最后,用Modelsim进行仿真测试,经检验,输出的编码结果正确。实验表明,提出的实现方案编码效率高,复杂度低,有一定的实用价值。

Aiming at overcoming the shortcomings of low scan efficiency and high complexity that exist in bit-plane coding, a bit-plane coding module in CCSDS image compression is proposed and implemented on FPGA. Bit-plane coding in CCSDS image compression is composed of several key modules including pretreatment, scan, entropy coding etc. Besides, the architecture in pipeline is adopted to design the system. Finally, the simulation test is carried out on Modelsim and the encoding result is turned out to be correct. The experimental results show that the implementation scheme proposed in this paper has high encoding efficiency, low complexity, thus it has great practical value.