基于新型电容阵列切换方式的10位低功耗SAR ADC

A 10-bit low power SAR ADC with an improved capacitive switching scheme

文中提出了一种10位低功耗逐次逼近(Successive-Approximation-Register,SAR)模/数转换器(Analog-to-Digital Converter,ADC),内部数/模转换网络采用一种新型的电容阵列开关切换方式,通过分段电容阵列、时序初始化和子参考电压来降低能耗,相比传统结构电容阵列的转换能耗减小了97.6%,单位电容数量减小了87%。整个ADC采用65 nm CMOS工艺进行设计,当采样频率为50KS/s,输入正弦波信号频率为1.5 k Hz左右时,ADC的有效位数(Effective Number of Bits,ENOB)为9.91位,总功耗低于450 n W,面积为136μm×176μm,非常适合植入式生物医疗电子的应用。

A 10-bit low power SAR （Successive-Approximation-Register, SAR） ADC （Analog-to-Digital Converter, ADC） is proposed in this paper. The internal digital-to-analog conversion is designed with an improved capacitive switching scheme. By using split-capacitor array, sequence initialization and sub- reference voltage, the switching energy is reduced by 97.6% and the number of the unit capacitor is reduced by 87%, compared with the traditional structure. The 10-bit ADC is designed based on a 65nm CMOS process. When 1.5 kHz fully-differential input signals are sampled at 50 KS/s sampling rate, the ENOB of the ADC is 9.91. The power consumption of this ADC is less than 450nW, and the area is 136μm×176μm, making this proposed ADC very suitable to implantable bioelectronics.