4Karanicolas A N,Lee Hae-Seung,Bacrania K L.A 15-b 1-M samples/s digitally self-calibrated pipelined ADC[J].IEEE J Solid-State Circuits,1993,28(12):1207-1215.
5Soenen E G,Geiger R L.An architecture and an algorithm for fully digital correction of monolithic pipelined ADC's [J].IEEE Transaction on Circuits and Systems.Ⅱ:Analog and Digital Signal Processing,1995,42(3):143- 153.
6Lin Y M,Kim B,Gray P R.A 13-b 2.5 MHz selfcalibrated pipelined A/D converter in 3-μm CMOS [J].IEEE J Solid-State Circuits,1991,26 (4):628-636.
