基于FPGA的旋变解算与M/T测速接口设计

The decode of resolver based on FPGA and the design for the port of M/T velocity measurement

旋变解算采用专用解码芯片为硬件核心,解算精度高、速度快、抗干扰能力强。利用该专用解算芯片提供的光编脉冲接口可以与FPGA控制核心进行对接,进而设计出能够根据转速区间自行调节脉冲分辨率能力的M/T测速算法,可以大大扩展高低速的测速范围。该系统能够以40 k Hz的采样频率向伺服系统提供位置、速度信息。

The decode of resolver uses special decoder chip as the core of hardware, with the advantage of high precision, fast speed and strong anti - interference capacity. The optical coded pulse port provided by the special decoder chip can be docked with the control core of FPGA. And then the M/T algorithm of the speed measurement was designed, which can reg- ulate the resolution ratio of the pulse by itself according to the velocity range. The measurement could extend the range of speed greatly. The system could provide information of position and velocity to the servo system with the sampling frequency of 40 kHz.