2Agrawal N, Prabhakaran V, Wobber T et al. Design tradeoffs for SSD performance//Proceedings of the USENIX 2008 Annual Technical Conference. Boston, USA, 2008: 57-70.
3Gal E, Toledo S. Algorithms and data structures for flash memories. ACM Computing Surveys, 2005, 37(2): 163.
4Ban A. Wear leveling of static areas in flash memory. US Patent App. 09/870, 315, Jun. 1 2001.
5Woodhouse D. JFFS: The iournalling flash file system//Pro- eeedings of the Ottawa Linux Symposium. Ottawa, Canada, 2001.
6Chang L. On efficient wear leveling for large-scale flash memory storage systems//Proceedings of the 2007 ACM symposium on Applied computing. Seoul, Korea, 2007: 1130.
7Chang Y H, Hsieh J W, Kuo T W. Endurance enhancement of flash-memory storage systems: An efficient static wear leveling design//Proceedings of the 44th Annual Design Automation Conference. Berkeley, USA, 2007:217.
8Spitzer F. Principles of Random Walk. Berlin: Springer Ver- lag, 2001.
9Boyd J N, Raychowdhury P N. Biased Random Walks. Virginia Journal of Science, 1995, 46(1) : 35.
10Kim J M, Noh S H et al. A space efficient flash translation layer for compact flash systems. IEEE Transactions on Consumer Electronics, 2002, 48(2): 366-375.