电源完整性分析及应用

Analysis and Application of Power Integrity

由于同步开关所产生的噪声电流,电源完整性问题如今已成为制约整个高速数字系统性能的一个关键因素。电源分配网络构成了高速数字系统最庞大最复杂的互连,约占全部互连空间的30%~40%。系统中所有的器件都直接或间接地连接到电源分配网络上,因此电源分配网络设计与电源完整性分析是数字系统中最复杂的部分。电源分配网络是高速数字设计的核心,直接影响电源完整性、信号完整性和电磁完整性等系统的性能。着重阐述了电源分配网络及频域目标阻抗法,并结合实际设计进行电源完整性的仿真分析。

Power Integrity（PI） has become a limiting factor for the overall performance of modern chip design due to the current surges caused by SSN. Power distribution network constitutes the largest and most complex interconnection-layered architecture of the high-speed digital system, about 30% -40%, of the interconnect space. All devices in the system are connected to PDN directly or indirectly, thereby posing great pressure on the design of PDN and the analysis of power integrity. PDN design affects power integrity, signal integrity, electromagnetic integrity and other system indicators. The paper focuses on the power distribution network and target impedance method. Simulation analysis on power integrity is then performed.