摘要
AXI总线内部传统的核间通信结构对处理器核之间的通信存在多方面的限制,已难以满足多核SoC(System on Chip)日益发展的性能需求。提出以交点队列(Crosspiont-Queued,CQ)型Crossbar代替传统的核间通信结构,设计一种多层AXI总线。通过Simulink工具对交点队列型核间通信结构进行建模与仿真,确定其交点缓存的最佳深度。并结合VCS仿真工具对所设计的RTL代码进行了全方面的仿真,结果表明,所设计的通信架构能够完整地实现读写功能。
With in AXI Bus ,there are many restrictions for the inter-core communication which lead to AXI Bus seem hardly to meet the growing performance requirement of multi-processor System-on-Chip.This paper presents a multi-layer AXI Bus which introduces crosspiont-queued structure to connect cores instead of traditional connection structure.Through modeling and simulation analysis by Simulink,the most optimum buffer lengths of crosspiont-queued can be confirmed. After times all round simulating for code of this design by VCS ,resuh shows that the design can realize total function which an on-chip communication architecture should possess.
出处
《电子技术应用》
北大核心
2017年第3期29-32,共4页
Application of Electronic Technique