一种12位电荷再分配逐次逼近型ADC设计与实现

Design and Realization of 12 bits Charge Redistribution Successive Approximation ADC

模数转换器(ADC)是信号处理系统中的关键部件。电荷再分配逐次逼近型模数转换器(SAR ADC)由于其高性价比在中速、中高分辨率ADC中得到了广泛应用,然而对于传统的算法和结构,不足以实现高分辨率及低功耗的ADC。阐述了一种12位电荷再分配逐次逼近型ADC电路,采用级联的电容阵列实现电荷再分配逐次逼近型结构,比较器采用5级全差分放大器级联与锁存器组合结构,整体电路易于片上系统集成,通过TSMC 0.25μm CMOS工艺流片,实测结果显示ADC的INL值为±3LSB、DNL值为±1LSB,满足12位分辨率的性能要求。

Analog to Digital Converter（ADC） is a key component in the signal processing system.As its high cost performance, SAR ADC has been widely used in medium and high resolution ADC. For the traditional algorithm and structure, however, is not enough to achieve high resolution and low power consumption ADC. The paper presents a 12 bits charge redistribution successive approximation ADC circuit. The charge redistribution structure is realized by series combined capacitor arrays. The structure of comparator is realized by five series difference amplifiers and latch combination. The whole circuit is easy to be integrated as the system on chip,which is fabricated on the 0.25μm TSMS CMOS line. The measured results show that the specifications, ADC INL of ±3LSB and NDL of ±1LSB, met the performance requirements for 12 resolution.