摘要
针对TD-LTE-A射频一致性测试仪中传统的EMIF并行接口已经不能满足芯片间大量数据交互的需求,提出了一种串行高速输入输出的设计方案。实现了基带系统中DSP芯片和FPGA芯片间的互连,对此进行仿真测试并在基带系统中进行了板级验证。结果证明了整个传输方案在实际应用中的正确性与可行性,并且得出SRIO平均传输速率为2.09 Gb/s,满足芯片间大量数据交互的需求。
The traditional EMIF parallel interface in the TD-LTE-A wire-less comprehensive test instrument has been unable to meet the needs of the large number of data exchange between the chips. In view of this problem,a design scheme of serial high-speed embedded technology SRIO is proposed.The scheme realizes the interconnection between the DSP chip and the FPGA chip in the baseband system and is simulated with actually verified on the PCB board.The results show this scheme is correct and feasible,the average transmission rate of the SRIO is 2.09 Gb / s and can meet a large number of data interaction between the chips.
作者
张德民
张巍
薛尧
ZHANG De-min ZHANG Wei XUE Yao(College of Electronic Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, Chin)
出处
《无线电通信技术》
2017年第2期83-86,共4页
Radio Communications Technology
基金
重庆市教委科学技术研究项目(KJ1500428)
