基于FPGA与CIS架构的玻璃管液位检测装置设计

Design of Glass Tube Liquid Level Detection Device Based on FPGA and CIS Architecture

在玻璃管液位检测装置的设计中,液位测量精度需要达到一定的标准。CIS传感器的驱动设计和采样数据的处理方法是解决测量精度问题的关键。文中采用FPGA内部锁相环和分频模块设计CIS驱动电路,通过时序仿真验证了该驱动电路可为CIS传感器提供稳定可靠的时钟信号;采用FPGA和Matlab相结合的方法设计16阶FIR数字低通滤波器,对采样数据进行滤波处理可有效滤除噪声干扰及不需要的CP高频信号。经过多次实验表明,该装置的测量误差约在±0.25 mm以内,达到了设计要求。

In the design of the glass tube liquid level detection device, the accuracy of the liquid level measurement needs to reach a certain standard. The driving design of CIS sensor and the processing method of sampled data are the key to solve the problem of measurement accuracy. In this paper, the CIS driver circuit is designed by using the FPGA internal phase locked loop and the frequency division module, which can provide a stable and reliable clock signal for the CIS sensor by the time sequence simulation; Using the method of combining FPGA and Matlab to design the 16 order FIR digital low- pass filter, the sampling data can be filtered to filter the noise interference and the CP high frequency signal. After many experiments show that the measurement error of the device is less than 0.25 mm, reached the design requirements.