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150mm掺P硅衬底外延层的制备及性能表征 被引量:8

Preparation and Characterization of Epitaxial Layer on 150mm Phosphorus-doped Silicon Substrate
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摘要 为适应肖特基二极管降低正向导通电压和制造成本的需要,采用150mm的掺P硅抛光片为衬底,通过化学气相沉积制备高阻硅外延层。利用傅里叶变换红外线光谱、电容-电压测试等方法对外延电学参数进行了测试和分析。对平板式外延炉的流场、热场与硅外延层厚度、电阻率均匀性的关系进行了研究。在此基础上采用周期变化的气流在外延层生长前反复吹扫腔体,进一步降低了非主动掺杂的不良影响,结合优化的流场和热场条件,最终制备出表面质量优、均匀性好的外延层,满足了厚度和电阻率不均匀性都小于1.0%的目标需求。采用该外延材料制备的肖特基二极管的正向导通电压降低了17.1%,显著减小了功耗,具备了良好的应用前景。 In order to reduce the forward voltage drop of Schottky barrier diode and its manufacture cost, highly resistive silicon epitaxial layer was prepared on 150 mm phosphorus--doped silicon polished substrate by using chemical vapor deposition method. Fourier transform infrared spectroscopy and capacitance voltage testing method were used to test and analyze the electrical parameters of silicon epitaxial layer. The relationship between the thickness, the resistivity of the silicon epitaxial layer and the gas flow field, thermal field has been studied respectively. The epitaxial layer with good surface quality and high uniformity was finally prepared by optimized gas flow field and thermal field. Since then, the reactor was blown by periodic air flow before epitaxial growth to further degrade the negative effect of non--active doping. It was finally satisfied that the thickness and resistivity nonuniformity were both less than 1.0 %. The Schottky barrier diode fabricated on the epitaxial material shows a 17.1% reduction of forward voltage and significant reduction of power consumption, which gives a good application prospect.
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2017年第1期67-72,共6页 Research & Progress of SSE
关键词 硅外延层 均匀性 非主动掺杂 肖特基二极管 正向导通电压 silicon epitaxial layer uniformity non-active doping Schottky barrier diode forward conductive voltage
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