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2.5D集成电路中低阻硅通孔的电学性能研究 被引量:2

Modeling and Analyzing the Electrical Properties of Low Resistivity Silicon Through Silicon Via(TSV)in 2.5DIntegrated Circuit
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摘要 2.5D集成技术(转接层技术)可以实现不同芯片间的异质集成,基于低阻硅通孔(TSV)的转接层利用了低阻硅的良好导电性,可以代替铜基硅通孔,具有工艺简单、成本低廉的优点.本文对低阻硅通孔进行了电磁学仿真,在1GHz时,回波损耗S_(11)为-24.7dB,插入损耗S_(21)为-0.52dB基本满足传输线的要求.提出了等效电路模型,与电磁仿真结果对比,具有较好的一致性,可以实现在0.1~10GHz带宽内的应用.最后对低阻硅通孔进行了TDT/TDR及眼图仿真,结果表明虽然低阻硅通孔的电阻对压降有较大影响,但是寄生电容的影响相对较小. 2.5D integration technology can enable the heterogeneous integration of several chips which fabricated by different technology or substrate.The low resistivity silicon through silicon via(LRS TSV)can take the place of copper TSV as its good conductivity,as well as the merits of simple process and low costs.The electromagnetic(EM)simulation of LRS TSV was performed.And the simulation results show that its return loss can be -24.7dB and insertion loss can be -0.52 dB at 1GHz which meet the requirement of transmission line.The electrical model of LRS TSV was proposed.Compared with electrical model,the EM results show good agreement,and it can be applied in 0.1-10GHz tape width.In the end,the simulation results of time domain transmission(TDT),time domain reflection(TDR)and eye diagram show that the resistance of LRS TSV has more considerable impacts on voltage drop than the parasitic capacitance of LRS TSV.
作者 王士伟 刘斌 卢威 严阳阳 陈淑芬 WANG Shi-wei LIU Bin LU Wei YAN Yang-yang CHEN Shu-fen(School of Optoelectronics,Beijing Institute of Technology, Beijing 100081, China)
出处 《北京理工大学学报》 EI CAS CSCD 北大核心 2017年第2期196-200,206,共6页 Transactions of Beijing Institute of Technology
基金 国家自然科学基金资助项目(61404008 61574016) "111"引智计划资助项目(B14010) 北京理工大学基础研究基金资助项目(20130542015)
关键词 三维集成电路 转接层 硅通孔 低阻硅 three dimensional integration interposer through silicon via low resistivity silicon
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