便携式逻辑分析仪硬件平台设计

Design of Hardware Platform of Portable Logic Analyzer

针对现有逻辑分析仪制造成本高、不便携带以及应用场合受限的问题,设计了一种基于FPGA+STM32的便携式逻辑分析平台。该平台硬件成本低、易携带等指标满足大多数测试要求。其设计核心主要包括主控芯片、被测信号采样、触发控制、数据锁存、高速存储、串口通信、TFT液晶显示等电路,其功能实现主要依靠FPGA的硬件设计和STM32的软件控制。该平台最大可实现32通道、存储深度64 K、分析速率400 MSa/s的测试要求。通过该平台可以实现被测信号的采集、缓存、分析、显示等功能。

Aiming at the problem of high cost,absence of portability and limited apply situation of logic analyzer,a portable logic analysis platform based on the FPGA and STM32 is designed. The platform satisfies great amount of test request by the index of cost low and portability,and its design core includes main chip,sample of the tested signal,trigger control,data latch,high-rate save,series-port communication and TFT display,and the realization of its function mainly relies on hardware design of FPGA and software control of STM32. The platform can mostly realize the 32 channels,the storage-depth of 64 k and the analyzed rate of 400 MSa/s. The platform can realize the collection,cache,analysis and display of the tested signal.