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一种可用于RF读写器的频率源设计

Design of a frequency source for radio frequency reader
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摘要 文章采用集成压控振荡器的锁相环芯片LMX2531设计了一种用于射频读写器的频率源,利用小数分频技术克服了整数分频锁相环所固有的高频率分辨率与相位噪声的矛盾,利用单片机对LMX2531Q1312E进行逻辑控制。该频率源可实现1 268~1 360 MHz频率范围内任意频点的合成。该信号源具有优良的相位噪声和杂散抑制,具有调试工作量小、一致性好等优点。 A frequency source is designed for radio frequency (RF) reader, utilizing PLL chip LMX2531Q1312E integrated with a voltage controlled oscillator (VCO). Using sigma-delta fractional-N PLL technology, this frequency source solves the rooted contradiction between high frequency resolution and low phase noise and uses microcontroller to conduct logistic control on LMX2531Q1312E. By the control of the micro-controller, the frequency source can generate any frequency range from 1 268 Hz to 1 360 MHz. The measurement results show that the frequency source has excellent phase noise, spurious suppression, and it needs less debugging work and is of good consistency.
作者 姚浩 张冬
出处 《江苏科技信息》 2017年第9期46-48,共3页 Jiangsu Science and Technology Information
关键词 锁相环 频率源 相位噪声 压控振荡器 射频读写器 phase locked loop (PLL) frequency source phase noise voltage controlled oscillator (VCO) radio frequency (RF) reader
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  • 1康东,石喜勤,李勇鹏.射频识别(RFID)核心技术与典型应用开发[M].北京:人民邮电出版社,2008.
  • 2游战清,刘克胜,张义强,等.无线射频识别技术(RFID)规划与实施[M].北京:电子工业出版社,2006.
  • 3王家礼,孙璐.频率合成技术[M].西安:西安电子科技大学出版社,2008.
  • 4许强,柴俊.基于DDS+PLL的频率合成器设计[J].舰船电子对抗,2007,30(4):24-26. 被引量:7
  • 5Pamarti S, Su Pin-En . Fractional phase locked loop-based frequency synthesis: a tutorial [J]. IEEE Transactions on Circuits and Systems II, 2009,56(12) :881 -885.
  • 6Rhee W,Song B S, AIi A, et al. A 1.1 GHz CMOS fractional-N frequency synthesizer with a 3-B third-order ∑-A modulator[J]. IEEE Journal of Solid-State Circuit,2000,35(10):1453 -1460.
  • 7Vaucher C S, Ferencic I, Locher M. A family of low- power truly programmable dividers in standard 0.35μm CMOS technology [J]. IEEE J Solid-State Circuits, 2000,35(7):1039 - 1045.
  • 8Juarez-Hernandez A, Diaz-Sanchez E. A novel CMOS charge-pump circuit with positive feedback for PLL ap- plications [ C] // Proceedings of The 8th IEEE International Conference on Electronics, Circuits and Systems(ICECS). Malta: IEEE,2001 :349 - 352.
  • 9Galton A, Wang I, Swaminathan K J. Spurious-tone suppression techniques applied to a wide-bandwidth 2.4 GHz fractional-N PLL [C] // Proceedings of IEEE International on Solid-State Circuits Conference. [S. 1. ] : IEEE, 2008:342 - 618.
  • 10Gonzalez-Diaz V, Garcia-Andrade M A,Flores-Verdad, et al. Efficient dithering in MASH sigma-delta modulators for fractional frequency synthesizers [J]. IEEE Transactions on Circuits System, 2010,57 (9) : 2394 - 2404.

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