1SIVAKUMAR S. EUV lithography: prospects and challenges [C] // Proceedings of 2011 the 16th Asia and South Pacific Design Automation Conference (ASP-DAC). Yokohama, Ja- pan, 2(}11 : 402.
2SINGH V. Lithography at 14 nm and beyond: choices and challenges [C] //Proceedings of 2011 the 48'h ACM/EDAC/ IEEE Design Automation Conference (DAC). New York, USA, 2011: 459.
3HARNED N, MEILING H, MICKAN U, et al. Results from alpha demo and an update on the realization of EUV lithogra- phy [C] // Proceedings of 2007 Digest of Papers Micropro- eesses and Nanotechnology. Kyoto, Japan, 2007:28 - 29.
4RONSE K, de BISSCHOP P, VANDENBERGHE G, et al. Opportunities and challenges in device scaling by the introduc- tion of EUV lithography [C] // Proceedings of 2012 IEEE International Electron Devices Meeting (IEDM). San Francis- co, CA, USA, 2012: 18.5.1-18.5.4.
5van den BRINK M. Continuing to shrink: next-generation li- thography-progress and prospects [C] //Proceedings of 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers. San Francisco, CA, USA, 2013: 20- 25.
6CHEN J J H, KRECINIC F, CHEN J H, et al. Future elec tron-beam lithography and implications on design and CAD tools [C] // Proceedings of the 16th Asia and South Pacific Design Automation Conference (ASP-DAC). Yokohama, Ja- pan, 2011: 403- 404.
7YOSHITAKE S, KAMIKUBO T. Resolution capability of EBM- 6000 and EBM-7000 for nano-imprint template [C]// Pro- ceedings of the 25^th European Mask and Lithography Confe- rence. Dresden, Germany, 2009:1 - 7.
8BURGHARTZ J N, IRMSCHER M, LETZKUS F, et al. Li- thography for the 32-nm node and beyond [C] //Proceedings of Bipolar/BiCMOS Circuits and Technology Meeting. Maas- tricht, Netherlands, 2006: 1- 5.
9STEVEN R J B, SALEEM H Z. Method and apparatus for extending spatial frequencies in photolithography images: US, 6042998 EP3. 1997 - 09 - 17.
10AUTH C. 22-nm fully-depleted tri-gate CMOS transistors [C] //Proceedings of IEEE Custom Integrated Circuits Con- ference. San Jose, CA, USA, 2012: 1- 6.
