基于CNFET的高速低功耗三值灵敏放大器设计

Design of High-Speed and Low-Power Ternary Sense Amplifier Based on CNFET

通过对碳纳米场效应晶体管(Carbon Nanotube Field Effect Transistor,CNFET)和灵敏放大器原理的研究,提出了一种基于CNFET的高速低功耗三值灵敏放大器设计方案。该方案首先剖析三值反相器电路结构,采用交叉耦合反相器作为三值锁存器;其次结合输入输出信号分离方法,提高放大差分信号速度;然后利用使能信号控制电路状态,降低三值灵敏放大器功耗。采用32nm CNFET标准模型库进行HSPICE仿真,结果表明所设计的电路逻辑功能正确;芯片成品率高达96.48%,具有较强的稳定性,且与利用CMOS设计的二值灵敏放大器相比工作速度提高64%,功耗降低83.4%。

By researching the structure of Carbon N a n o t u b e Field Effect Transistor （C N F E T ） and the principle of sense amplifier, a scheme of high-speed and low-power ternary sense amplifier circuit is proposed. In this scheme , the circuit structure of a ternary inverter is analyzed. A n d then, w e use cross-coupled inverters m e t h o d to implant a ternary latch. T o improve the speed of differential signal amplification,the input and output signal separation technique is selected. A n d also,the working states are controlled by enable signal to reduce the pow e r consumption of ternary sense amplifier circuit. U n d e r Stanford University 32 nm CNFET standard m o d e l , H S P I C E simulation results s h o w that the designed circuit has correct logic functionality. T h e chip yield of the circuit is up to 96. 4 8 % with strong stability. Comparing with conventional binary CMOS sense amplifier, the proposed circuit increases the speed by 64%, and decreases the p o wer consumption by 8 3 . 4 % .