摘要
Nanowires with inhomogeneous heterostructures such as polytypes and periodic twin boundaries are interesting due to their potential use as components for optical, electrical, and thermophysical applications. Additionally, the incorporation of metal impurities in semiconductor nanowires could substantially alter their electronic and optical properties. In this highlight article, we review our recent progress and understanding in the deliberate induction of imperfections, in terms of both twin boundaries and additional impurities in germanium nanowires for new/enhanced functionalities. The role of catalysts and catalyst-nanowire interfaces for the growth of engineered nanowires via a three-phase paradigm is explored. Three-phase bottom-up growth is a feasible way to incorporate and engineer imperfections such as crystal defects and impurities in semiconductor nanowires via catalyst and/or interfacial manipulation. ＂Epitaxial defect transfer＂ process and catalyst-nanowire interfacial engineering are employed to induce twin defects parallel and perpendicular to the nanowire growth axis. By inducing and manipulating twin boundaries in the metal catalysts, twin formation and density are controlled in Ge nanowires. The formation of Ge polytypes is also observed in nanowires for the growth of highly dense lateral twin boundaries. Additionally, metal impurity in the form of Sn is injected and engineered via third-party metal catalysts resulting in above-equilibrium incorporation of Sn adatoms in Ge nanowires. Sn impurities are precipitated into Ge bi-layers during Ge nanowire growth, where the impurity Sn atoms become trapped with the deposition of successive layers, thus giving an extraordinary Sn content （〉6 at.%） in Ge nanowires. A larger amount of Sn impingement （〉9 at.%） is further encouraged by utilizing the eutectic solubility of Sn in Ge along with impurity trapping.
Nanowires with inhomogeneous heterostructures such as polytypes and periodic twin boundaries are interesting due to their potential use as components for optical, electrical, and thermophysical applications. Additionally, the incorporation of metal impurities in semiconductor nanowires could substantially alter their electronic and optical properties. In this highlight article, we review our recent progress and understanding in the deliberate induction of imperfections, in terms of both twin boundaries and additional impurities in germanium nanowires for new/enhanced functionalities. The role of catalysts and catalyst-nanowire interfaces for the growth of engineered nanowires via a three-phase paradigm is explored. Three-phase bottom-up growth is a feasible way to incorporate and engineer imperfections such as crystal defects and impurities in semiconductor nanowires via catalyst and/or interfacial manipulation. ＂Epitaxial defect transfer＂ process and catalyst-nanowire interfacial engineering are employed to induce twin defects parallel and perpendicular to the nanowire growth axis. By inducing and manipulating twin boundaries in the metal catalysts, twin formation and density are controlled in Ge nanowires. The formation of Ge polytypes is also observed in nanowires for the growth of highly dense lateral twin boundaries. Additionally, metal impurity in the form of Sn is injected and engineered via third-party metal catalysts resulting in above-equilibrium incorporation of Sn adatoms in Ge nanowires. Sn impurities are precipitated into Ge bi-layers during Ge nanowire growth, where the impurity Sn atoms become trapped with the deposition of successive layers, thus giving an extraordinary Sn content （〉6 at.%） in Ge nanowires. A larger amount of Sn impingement （〉9 at.%） is further encouraged by utilizing the eutectic solubility of Sn in Ge along with impurity trapping.
