具有纵向源极场板的绝缘体上硅器件新结构

New Silicon on Insulator Device with a Vertical Source Field Plate

采用软件仿真一系列横向双扩散金属氧化物半导体场效应管(Laterally double-diffused metal oxide semiconductor,LDMOS)结构,为缓解绝缘体上硅(Silicon on insulator,SOI)器件的击穿电压VB和漂移区的比导通电阻Ron.sp之间的矛盾关系,提出了一种具有纵向源极场板的双槽SOI新结构。该结构首先采用槽栅结构,以降低比导通电阻Ron.sp;其次,在漂移区内引入SiO_2介质槽,以提高击穿电压VB;最后,在SiO_2介质槽中引入纵向源极场板,进行了电场重塑。通过仿真实验,获得器件表面电场、纵向电场曲线及器件击穿时的电势线和导通时的电流线等。结果表明,新结构的VB较传统LDMOS器件提高了121%,Ron.sp降低了9%,器件优值FOM值达到15.2 MW·cm^(-2)。

The simulations of LDMOS devices with various structures have been performed. In order to alleviate the contradiction between the breakdown voltage and specific on-resistance in the silicon on insulator （SOI） device, a dual channel SOI LDMOS with a vertical source field plate was proposed. The device has the features as follows： First, a trench gate is to lower the specific on-resistance; second, a SiO2 dielectric layer is introduced into the drift region to increase the breakdown voltage; finally, a vertical source field plate is introduced to modulate the drift region electric field. Through the simulation, the surface and y-direction electric field distributions are obtained. The simulation results show that, compared to the traditional LDMOS, the break-down voltage is increased by 121% and the specific on-resistance is reduced by 90/oo in the proposed structure, resulting in a FOM value of 15.2 MW· cm ^-2.