基于通用可重构处理器的AES算法设计与实现

Design and Implementation of AES Algorithm Based on General Reconfigurable Processor

在通用可重构处理器架构基础上,提出一种高级加密标准AES-128实现方案。该方案从算法结构、处理单元(PE)利用率和存储开销3个方面进行优化,使用1个256 bit×32 bit的查找表完成加密时的字节代替与列混合步骤,通过数据分解和数据流分解提高PE利用率,采用本地寄存器存储数据并通过合理布局PE减少存储开销。实验结果表明,该方案PE利用率达到60%,访存开销较完全使用共享存储时降低74%,相对于Intel Atom230串行实现方式吞吐率提高100%左右。

Based on the architecture of General Reconfigurable Processor （GReP） , this paper proposes an Advanced Encryption Standard（ AES）-128 implementation scheme, which is optimized in algorithm structure, Processing Element （PE） utilization ratio and storage cost. This scheme uses a 256 bit ~ 32 bit look-up table to complete the byte instead of mixing with the column on encryption time,improves PE utilization ratio through data decomposition and data stream decomposition, and reduces storage overhead through local register and reasonable layout of PE. Experimental result indicates that,PE utilization ratio reaches 60% and memory access cost reduces 74% than totally using shared memory. Compared with the serial method on Intel Atom230,this scheme increases throughput rate by about 100% .