摘要
基于Xilinx芯片的FPGA集成了越来越多的可配置逻辑资源、各种各样的外部总线接口以及丰富的内部RAM资源。在FPGA的电路设计中,上电配置电路至关重要。其中,DONE信号上拉电阻阻值的选择很容易被人忽略,错误的阻值选择往往会导致意想不到的情况。通过采用4.7 kΩ电阻上拉DONE信号产生的试验结果,来分析DONE信号上拉电阻必须为330Ω的原因。
FPGA based Xilinx chip integrates more and more configurable logic resources,a wide variety of external bus interfaces and a wealth of internal RAM resources. In the circuit design of FPGA,the design of the power up circuit is very important. Among them,the DONE signal pull-up resistor is very easy to be ignored,the error resistor selection often leads to unexpected situations. In this paper,the reason that the pull-up resistor of the DONE signal must be 330 Ω is analyzed,by the test results generated by the 4. 7 kΩ pull-up resistor of DONE signal.
出处
《微型机与应用》
2017年第10期37-39,共3页
Microcomputer & Its Applications