面向FPGA的稀疏傅里叶并行算法实现

The parallel framework of sparse Fourier transform on FPGA

提出了一种基于最优搜索的稀疏傅里叶变换(SFT)的并行实现设计。首先将输入信号分为并行N组,分别进行快速傅里叶变换(FFT),实现信号频率分量的取模处理,然后通过排序搜索获得。经验证,相较于FFTW,当信号长度大于524 288时,执行时间会有更好的表现;相较于正交匹配算法及其他SFT的FPGA实现,其系统的复杂度降低了。

This paper proposed the parallel framework of sparse Fourier transform and implemented all the design on FPGA. The input signal is divided into N groups to search for the optimal solution. It is proved that the design compared to the fast Fourier transform in the West( FFTW),the execution time has a better performance when the signal length is greater than a specific value 524 288,and compared to the FPGA implementation of orthogonal matching pursuit algorithm and other implementation of sparse Fourier transform algorithm,this design reduces the complexity of the system.