基于FPGA的VC12交叉汇聚系统研究

Research on VC12 crossover and convergence based on FPGA

为了实现SDH通信中VC12颗粒的提取,应用FPGA实现ITU-T G.707协议中粒度为VC12的严格无阻塞全交叉系统。该系统交叉容量为15G,实现6个STM16输入到4个STM16输出的VC12汇聚型交叉。完成开销解释和生成、指针解释和生成、帧识别定位和成帧等标准SDH协议处理,并对数据传输性能进行监测和统计,实现告警和中断上报功能。

In order to realize the extraction of VC12 particles in SDH communication, this pape uses FPGA to achieve a strict non blocking all intersection of granularity of VC12 in ITU-T G.707 protocol. Cross capacity is 15G with implementation of 16 STM16 inputs to the 4 STM16 output data convergence cross supporting VC 12 level broadcast function. It completes overhead interpretation and generation, pointer interpretation and generation, flame search and generation and others in SDH. It also do monitoring and statistics of data trans- mission performance with alarm and interrupt reporting functions.