一种FPGA芯片时钟SKEW的测试方法

Methods for Measuring Clock Skew on FPGA Devices

随着FPGA规模的扩大和工作频率的提高,时钟Skew成为FPGA越来越重要的性能指标,而如何精确测试芯片中的时钟Skew也就显得尤为重要.对此以JFPGA-YX2芯片为例,介绍一种可以精确测量FPGA时钟Skew的测试方法.将芯片内部的时钟资源通过配置逻辑配置成一系列的环形振荡器,每个振荡器的振荡频率由该振荡器所包含路径的延时决定.对这些振荡器的测量频率值进行运算处理即可获得精确的时钟Skew.

During FPGA is becoming larger and clock frequency higher, the clock skew is key factor during design implemented, so it＇s more important to get the clock skew parameter of FPGA clock system when FPGA device design. In the paper, based on JFPGA-YX2 device, introduce methods to measure accurately skew of clock distribution networks on FPGA, it use ring oscillators formed on the device using clock tree and configurable logic, then measure the frequency of the ring oscillator, last calculate and get the clock propagation delay and clock skew.