宽带低相噪频率合成锁相环的设计与实现

The Design and Implementation of Wideband and Low Phase Noise PLL Frequency Synthesizer

宽带低相噪本振频率合成电路在无线信号接收机中具有重要作用,但传统的频率合成电路需要取样本振环路、预调谐辅助环路等电路来计算取样本振频率、取样次数、预置电压等参数。针对多环锁相实现宽带低相噪本振频率合成的电路和控制过于复杂的问题,提出了一种单环锁相的宽带低相噪频率合成锁相环方法。使用压控振荡器(VCO)输出与高分辨率频率信号混频下变频,得到频率间隔较大的可变频率信号,并经可变整数分频后,得到高频鉴相信号。通过优化和平衡单环锁相频率合成系统的鉴相频率和分频比实现宽带低相噪本振信号具有较好的相位噪声水平。测试结果显示该文提出宽带低相噪频率合成锁相环的相位噪声可以达到-120dBc/Hz@20kHz。

Wideband and low phase noise PLL frequency synthesizer system plays an important role in the wireless signal receiver,while the traditional frequency synthesizer should calculate the sampling frequency,sampling times,preset voltage and other parameters by the local sample oscillator circuit,pre-tuning auxiliary loop and other circuits.In order to solve the problem caused by the complex circuits and control,a wideband and low phase noise frequency synthesizer system with single PLL is proposed in this paper.The output signal of the voltage controlled oscillator(VCO) is mixed down-conversion with a high-resolution frequency signal,and the variable frequency signal with large frequency interval is obtained.The phase noise can be achieved by optimizing and balancing the phase-detection frequency and the frequency division ratio of the single PLL frequency synthesizer.The experimental results show that the phase noise of the wideband and low phase noise frequency synthesizer system with single PLL can touch-120 dBc/Hz@20kHz.