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适用于10位10Ms/s SAR ADC的采样保持电路设计

A Novel Sampling Switch Applied for 10Bits 10Ms/s SAR ADC
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摘要 针对传统采样保持电路线性度低、面积大、速度慢、输入信号摆幅受限等问题,本文采用了一种新型带预充电的采样保持电路,适用于10位10Ms/s逐次逼近模数转换器.电路采用SMIC 0.18μm混合CMOS工艺,与传统电路相比,新型电路优化了电路的线性度,提升了速度,减小了面积,输入可达满摆幅,整体电路性能满足设计要求. Aiming to deal with the defects in conventional sample-and-hold circuit, such as low linearity, large area, slow speed and limited input swing, this paper proposed a novel pre-charge sampling switch which can be applied to 10-bit 10Ms/s successive approximation A/D converter (SAR ADC). Compared with conventional circuit, the new one can admirably improve the circuit's linearity, increase the speed, reduce the layout's area, avoid the reverse conduction and the input signal can reach a full amplitude. The performance of this technique is demonstrated in SMIC's 0.18 mixed-signal CMOS process. The result shows that the proposed sample-and-hold circuit fulfills the expected requirements.
作者 戴澜 张家军
出处 《北方工业大学学报》 2017年第2期28-32,共5页 Journal of North China University of Technology
关键词 采样保持电路 栅压自举 模数转换器 sample-and-hold circuit bootsrapping switch A/D converter
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