摘要
基于90 nm栅长的InP高电子迁移率晶体管(HEMT)工艺,研制了一款工作于130~140 GHz的MMIC低噪声放大器(LNA)。该款放大器采用三级级联的双电源拓扑结构,第一级电路在确保较低的输入回波损耗的同时优化了放大器的噪声,后两级则采用最大增益的匹配方式,保证了放大器具有良好的增益平坦度和较小的输出回波损耗。在片测试结果表明,在栅、漏极偏置电压分别为-0.25 V和3 V的工作条件下,该放大器在130~140 GHz工作频带内噪声系数小于6.5 dB,增益为18 dB±1.5 dB,输入电压驻波比小于2∶1,输出电压驻波比小于3∶1。芯片面积为1.70 mm×1.10 mm。该低噪声放大器有望应用于D波段的收发系统中。
Based on the 90 nm-gate-length InP high electron mobility transistor (HEMT) technolo- gy, a low noise amplifier (LNA) working at 130-140 GHz was developed. The three-stage cascade cir- cuits with two voltages bias were used in the LNA. The first stage circuit achieved low input return loss with optimized noise figure, while the maximum gain matching network was used in the last two stages circuits to ensure good gain flatness and low output return loss for the LNA. On-wafer test results show that at drain bias voltage of 3 V and gate bias voltage of -0.25 V, the noise figure is lower than 6.5 dB, and the gain is (18±1.5) dB within the frequency range of 130-140 GHz. The input voltage standing wave ratio (VSWR) is less than 2 : 1, while the output VSWR is less than 3 : 1. The chip area is 1.70 mm: 1.10 mm. The developed LNA has great potential for applications in the D-band transceiver system.
出处
《半导体技术》
CSCD
北大核心
2017年第6期426-430,共5页
Semiconductor Technology