基于仿真软件的时序逻辑电路模型设计研究

Design and Implementation of the Timing Sequence Logic Circuit Model based on Simulation Software

依据现代可鳊程逻辑器件的设计要求,对传统与现代可编程逻辑器件设计流程进行研究,利用QuartusⅡ软件平台,运用D触发器及基本门电路实现4位并行输入、输出及右移位寄存器时序逻辑功能电路进行了详实的设计及仿真研究,达到了设计要求,实验表明,该设计是合理的.

The paper discussed the design process of the traditional and modem programmable logic de- vice, according to the design of the modem programmable logic devices process demand. The detailed design and simulation research has been carried on using the D flip -flop and basic gates circuit for four parallel in - output fight - shift register function of temporal logic circuit based on QuartusII software platform. That has reached the design requirements. The results show rationality of the design.